This paper presents the design and implementation of a multi-bit multiplexer using majority logic-based Quantum-dot Cellular Automata (QCA). QCA is a promising alternative to traditional CMOS technology due to its low power consumption, high speed, and reduced size, making it highly suitable for future nanoelectronic devices. Multiplexers are fundamental components in digital circuits, and optimizing their design is crucial for improving overall circuit performance. This study explores the use of majority logic in QCA to design a multi-bit multiplexer with minimized cell count, reduced area, and lower propagation delay. A detailed design methodology is provided, including cell configuration, majority logic implementation, and optimization strategies. The proposed design is simulated and validated using QCADesigner, and its performance is compared with existing QCA-based multiplexer designs. The results demonstrate significant improvements in terms of cell count, area, and speed, showcasing the potential of majority logic-based QCA for advanced digital circuit design.

This paper presents the design and implementation of a multi-bit multiplexer using majority logic-based Quantum-dot Cellular Automata (QCA).